is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 1 flyback configuration led driver with integrated pfc and no feedback general description the is31lt39 29 is a primary side, peak current mode, isolated type hbled driver. the device works at a constant frequency in discontinuous conduction mode to pro vide a constant power to the input. it eliminates the need for an opto - coupler, tl431, or any other type of secondary side feedback. it operates from an input voltage range of 85vac to 265vac. the IS31LT3929 integrates over current/voltage protection, as well as includes a thermal shutdown to halt the switching action in the case of abnormally high operating temperatures. features ? power factor correction to > 0.9 ? 3% typical current accuracy ? no l oop compensation required ? wide input voltage range: 85v t o 265vac ? i nternal o ver - temperature protection applications ? ac/dc constant current led driver ? general ac/dc power supply ? general led lighting typical operating circuit 85~265vac fuse bd c1 c2 c3 c4 c5 c6 r1 r2 r3 r4 r5 rcs r6 r7 r8 d1 d3 d2 d4 led1 ledn tr q1 u1 3929 gate cs gnd nc vcc vsine fset fb figure 1 typical operating circuit copyright ? 2011 integrated silicon solution, inc. all rights reserved. issi reserves the right to make changes to this specification and its products at any time without notice. issi assumes no liability arising out of the application or use of any information, produ cts or services described herein. customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orde rs for products. integrated silicon solution, inc. does not recommend the u se of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effec tiveness. products are not authorize d for use in such applications unless integrated silicon solution, inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of integrated silicon solution, inc is adequately protected under the circumstances
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 2 pin configurations package top view sop - 8 p in descriptions pin name function 1 vsine line voltage sense input required for pfc. 2 nc no connect. must leave floating in the a pplication. 3 fset connect a resistor from this pin to gnd to set the operating frequency 4 gnd ground. common to all internal circuitry. 5 fb auxiliary winding voltage sensing pin for ovp. 6 cs primary winding peak current detection input. 7 gate po wer nmos gate driving output 8 vcc internal circuit power supply input. ordering information order part no. package qty/ r eel is31 lt39 29- gr ls2 - tr sop - 8 , lead - free 2500
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 3 absolute maximum ratings parameter value v cc to gnd - 0.3v to 30 v vsine, nc, fs et, cs, fb - 0.3v to 5.5 v v cc max. input current (note ) 10ma junction temperature range - 40 o c to +150 o c storage temperature range - 65 o c to +150 o c esd human model 40 00v stresses beyond those listed under ?absolute maximum ratings? may cause permanent da mage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electr ical characteristics (un less otherwise specified, v cc =1 6 v, fb=0v, vsine=2.5 v, r set = 300 k ? , and t amb =25 o c ) symbol parameter conditions spec unit min typ max vth_s vcc start voltage threshold vcc rising 14.5 16 17.5 v vth_d vcc undervoltage threshold vcc falling 7 8 9 v v gate gate output voltage clamp value 16 17.5 19 v icc quiescent supply current not switching 600 ua ist startup current vcc < vth_s 60 ua vcs primary peak current con trol threshold 0.5 v tblank blanking time 500 ns tr rise time cl = 1nf 100 ns tf fall time cl = 1nf 50 ns vovp _h ovp rising threshold 1.25 v vovp _l ovp falling threshold 1.0 v f operating frequency rset = 300k 50 khz dmax maximum d uty cycle 50 % tre 1 short circuit protection delay f = 50k 80 ms tre2 cs over current protection delay f = 50k 80 ms
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 4 typical performance characteristics tbd
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 5 block diagram 0.6v cs cmp1 cmp1 driver gate gnd vdd vsupply voltage regulator vdda 30v ovp 10uf rin ovp vsine por uvlo gate driver logic rcs nmos agc ocp r s fb ct opt zcd valley detec osc function switch 4.5v 17.5v
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 6 application information startup voltag e when the vcc pin of the IS31LT3929 reaches 16.5v, the ic is allowed to start. after power is applied to the circuit, r3 provides a trickle current to allow c4 to begin charging. the ic starts working when the voltage of c4 reaches the start threshold for the ic. the value of r3 & c4 can be determined by the input voltage. larger values of r3 increase the startup time, but reduce the losses after the circuit is running. a low esr capacitor of 10uf, 50v is recommended for c4. vsine detection networ k the input pin, vsine is used to detect the input voltage which controls the peak current in the inductor. this allows the IS31LT3929 to actively correct the power factor during operation . the maximum input voltage of the vsine pin is 2.5v. this resist or network should be computed such that the peak input voltage condition corresponds to ~2.4vdc. thus, for 265vac, the peak voltage is 374.7v. at 374.7v input, the output of the network should be 2.4v, thus values of r1=1.56m and r2 = 10k are appropriate . high tolerance resistors of 1% should be used. a small, 1nf capacitor, c2, is used to filter high frequency noise. working frequency the working frequency is set by connecting a resistor between the fset pin and ground. the relationship between the f requency and resistance is: ext r f 9 10 15 = output open circuit protection open circuit protection is realized by connecting a resistor network to the fb pin. by sensing the voltage of the auxiliary winding, which is proportional to the output v oltage, the IS31LT3929 detects when there is an open circuit condition on the secondary and stop the switching action. the threshold voltage for the fb pin is 1.25v. output short circuit protection if the output of the circuit is suddenly shorted, the vo ltage of the secondary winding is quickly reduced. this in - turn reduces the reflected voltage in the auxiliary winding, so vcc of the device drops rapidly. if the vcc voltage drops below the uvlo, the device will stop switching, thus indirectly achieving output short circuit protection. uvlo protection the device will not operate if the vcc voltage is below the under - voltage lockout threshold. cs pin short circuit protection if the cs pin is shorted to ground, the device can no longer detect the peak current of the inductor, and thus will quickly cause damage to the power mos, inductor, or other circuit components. the maximum duty cycle of the gate is limited to 50% internally to prevent a shorted cs pin from going into current runaway. pcb design considerations (1) c omponents such as r2, r4, r6, r7, etc. which are connected to the ic should be mounted as close to the ic as possible. (2) bypass capacitors should always be mounted as close to the ic as possible. (3) s witching signal traces should be kept as sho rt as possible and not be routed parallel to one another so as to prevent coupling.
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 7 l assification reflow profiles profile feature pb - free assembly preheat & soak temperature min (tsmin) temperature max (tsmax) time (tsmin to tsmax) (ts) 150c 200c 60- 1 20 seconds average ramp - up rate (tsmax to tp) 3c/second max. liquidous temperature (tl) time at liquidous (tl) 217c 60- 150 seconds peak package body temperature (tp)* max 260c time (tp)** within 5c of the specified classification temperature (tc) m ax 30 seconds average ramp - down rate (tp to tsmax) 6c/second max. time 25c to peak temperature 8 minutes max. classification p rofile
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 8 tape and reel information
is31lt3 929 prelimin ary integrated silicon solution, inc. ? www.issi.com rev. a , 4/2/2012 9 package information package outline drawing #d08 4.70 5.10 1.27bsc 3.80 4.00 8 0 5.80 6.20 0.40 1.27 0.17 0.25 1.35 1.75 1.35 1.55 0.10 0.25 0.33 0.51
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